An Energy-Efficient CMOS Dual-Mode Array Architecture for High-Density ECoG-Based Brain-Machine Interfaces

Keyphrases

• Electrocorticography (ECoG) 100%
• High Density 100%
• Brain-machine Interface 100%
• Dual-mode 100%
• Energy Efficient 100%
• Array Architecture 100%
• Signal Acquisition 66%
• Feature Extraction 66%
• Signaling Pathway 33%
• Signal Processing Techniques 33%
• Brain Activity 33%
• Electroencephalography 33%
• System Interface 33%
• Pathway-based Approach 33%
• Digitization 33%
• Acquisition System 33%
• Power Signal 33%
• Human Subject Test 33%
• Common-mode Rejection Ratio 33%
• Ultra-low Power 33%
• Neural Features 33%
• Analog Signal Processing 33%
• Power Saving 33%
• Fully Implantable 33%
• Potential Power 33%
• 32-channel 33%
• Power Reduction 33%
• Feature Weight 33%
• Die Area 33%
• Power Efficiency Factor 33%
• 180 Nm Technology 33%
• High Band 33%
• Electrocorticography Signal 33%
• Full-band 33%
• Chip Measurements 33%
• Performance Modes 33%
• Noise Efficiency Factor 33%
• Power Envelope 33%
• Envelope Extraction 33%

Engineering

• Machine Interface 100%
• Array Architecture 100%
• Dual-Mode 100%
• Feature Extraction 66%
• Signal Acquisition 66%
• Mode Operation 66%
• Front End 66%
• Efficiency Factor 66%
• Processing Method 33%
• Early Stage 33%
• Brain Activity 33%
• Analog Signal 33%
• Acquisition System 33%
• Common Mode 33%
• Base Band 33%